Phase change memory

ABSTRACT

A phase change memory comprises a phase-change recording layer for recording information through changing between a crystal phase and an amorphous phase; and a means for applying a tensile strain onto the phase-change recording layer, thereby providing the memory having high reliability, as well as, high tolerance or durability against repetitive rewriting operation.

BACKGROUND OF THE INVENTION

The present invention relates to a phase change memory, enabling to record, delete, rewrite and reproduce information, with using the phase change.

As is described in the following Non-Patent Document 1, in accordance with a phase change recording method, write-in is conducted for information, with using the fact that a material of the recoding film or layer thereof causes the phase change, i.e., between the crystal phase and the amorphous phase, while read-out is conducted through determination on made on whether it is the crystal phase or the amorphous phase. In case when using a recording film material, such as, chalcogenide (for example, a material group of GeSb_(x)Te_(y)), which is mostly applied in this method, because of a low stability of the amorphous phase, it is sometimes crystallized with the passage of time. Such the drawback is more serious, in particular, under the environment or circumstance of high temperature. And, as is also described in the document mentioned above, in case where the coefficient is large, in particular, about voluminous variation between crystal phase/amorphous phase, there is also a drawback that the characteristics thereof are deteriorated due to repetition of the rewriting. In this document, it is described that the higher in the lattice defect density of the composition, the smaller in the voluminous variation thereof, and therefore that it is high in the tolerance or durability against the repetition. Further, as was also described in the Non-Patent document 1, an important problem to be solved is an increase of a rewriting speed, by speeding up the speed of phase changing.

Non-Patent Document 1: “Applied Physics” Vol. 1, No. 5 (2002), from page 562 to page 565.

BRIEF SUMMARY OF THE INVENTION

A first object, according to the present invention, is to provide a phase change memory, having high reliability. And, a second objection, according to the present invention, is to provide a phase change memory, being stable in the amorphous condition thereof. Also, a third objection, according to the present invention, is to provide a phase change memory, having high tolerance against the repetition of rewritings. Further, according to the present invention, a fourth object is to provide a phase change memory, being fast in the speed of rewriting.

As a result of zealous studies made by the inventors, for obtaining a means for improving the stability of the amorphous phase of a film or layer for phase-change recording, they found out that it is effective to bring an amorphous material having atomic arrangement, being similar to that of the amorphous phase of the phase-change recording film or layer, to be in contact with that phase-change recording film or layer.

Also, the inventors makes the fact clear that, when trying to improve the tolerance against repetition with applying a composition having high density of the lattice defects, while utilizing the knowledge of the Non-Patent Document 1 mentioned above therein, but the regularity is deteriorated in the atomic arrangement under the crystal condition (i.e., deleting condition), as an adverse reaction due to the fact that the lattice defects are much therein; therefore it is difficult to distinguish it from the amorphous phase. Then, the inventors found out that it is effective of letting the recording film or layer to have tensile or stretching strain therein, as a result of the zealous studies for obtaining a means to improve the tolerance against repetition, but without applying such the composition having high density of lattice defects. Further, they found that it is possible to obtain an effect of increasing the rewriting speed, by letting the recording film or layer the tensile or stretching strain therein.

For accomplishing such the objects, according to the present invention, there is provided a phase change memory, comprising the following constructions; i.e., a phase-change recording film or layer for recording information therein through altering or changing between a crystal phase and an amorphous phase; and a means for applying a tensile or stretching strain onto the said phase-change recording film or layer.

And, according to the present invention, it is possible to provide a phase change memory, having high reliability. Also, according to the present invention, it is possible to provide a phase change memory, being stable in the amorphous condition thereof. Also, according to the present invention, it is possible to provide a phase change memory, having high tolerance against the repetition of rewritings. Further, according to the present invention, it is possible to provide a phase change memory, being fast in the speed of rewriting.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING

Those and other objects, features and advantages of the present invention will become more readily apparent from the following detailed description when taken in conjunction with the accompanying drawings wherein:

FIG. 1 is a cross-sectional view of a principle portion of a phase change memory, according to a first embodiment of the present invention;

FIG. 2 is a graph for showing a manner of how activation energy, for changing from amorphous phase into crystal phase, depends on a material of a lower electrode, in particular, in case when applying GeSb₂Te₄ as a recoding film 104;

FIG. 3 is a graph for showing a manner of how activation energy, for changing from amorphous phase into crystal phase, depend on a material of a lower electrode, in particular, in case when applying Ge₂Sb₂Te₅ as the recoding film 104;

FIG. 4 is a graph for showing a manner of how activation energy, for changing from amorphous phase into crystal phase, depends on a material of a lower electrode, in particular, in case when applying ZnGeTe as the recoding film 104;

FIG. 5 is a graph for showing a manner of how activation energy, for changing from amorphous phase into crystal phase, depends on Si density within TiN, in case when applying Ge₂Sb₂Te₅ as a recoding film 104 and TiN as a lower electrode 102, in particular, within a low density region thereof;

FIG. 6 is a graph for showing a manner of how activation energy, for changing from amorphous phase into crystal phase, depends on Si density within TiN, in case when applying Ge₂Sb₂Te₅ as the recoding film 104 and TiN as the lower electrode 102, in particular, within a high density region thereof;

FIG. 7 is a graph for showing a manner of how activation energy, for changing from amorphous phase into crystal phase, depends on Si density within TaN, in case when applying Ge₂Sb₂Te₅ as a recoding film 104 and TaN as a lower electrode 102, in particular, within a low density region thereof;

FIG. 8 is a graph for showing a manner of how activation energy, for changing from amorphous phase into crystal phase, depends on Si density within TaN, in case when applying Ge₂Sb₂Te₅ as the recoding film 104 and TaN as the lower electrode 102, in particular, within a high density region thereof;

FIGS. 9(a) and 9(b) are graphs for showing an effect of the tensile or stretching strain in relation to time of phase change, respetively;

FIG. 10 is a cross-sectional view of a principle portion of a phase change memory, according to a second embodiment of the present invention;

FIG. 11 is a cross-sectional view of a principle portion of a phase change memory, according to a third embodiment of the present invention;

FIG. 12 is a cross-sectional view of a principle portion of the phase change memory, applying transistors therein for selecting a memory cell;

FIG. 13 is a circuitry diagram of the principle portion of the phase change memory, applying the transistors therein for selecting the memory cell;

FIG. 14 is a cross-sectional view of a principle portion of the phase change memory, applying diodes therein for selecting a memory cell;

FIG. 15 is a circuitry diagram of the principle portion of the phase change memory, applying the diodes therein for selecting the memory cell; and

FIG. 16 is a block diagram of a chip of a SRAM memory equipped with a defect remedy or relief circuit.

DETAILED DESCRIPTION OF THE INVENTION

Hereinafter, embodiments according to the present invention will be fully explained by referring to the attached drawings.

Embodiment 1

Next, the cross-sectional structure of a principle portion is shown in FIG. 1, first of all, in particular, within the phase change memory, according to the first embodiment of the present invention. Upon a silicon substrate 101 are built up layers, i.e., forming a wiring film or layer 102 a, a lower electrode layer 102, an insulation layer 103, a phase-change recording layer 104, a ferromagnetic layer 104 p, a ferromagnetic layer 104 q, an upper electrode layer 105, a wiring layer 106, an insulating layer 107, a wiring layer 108, and an insulating layer 109, in that sequence thereof. Those are formed with applying the method, such as, the spattering, the chemical vapor deposition (CVD), or the plating, for example. The phase-change recording layer 104 includes at least two (2) elements therein, as the constituent ones thereof, which are selected from Ge, Sb and Te, and it is mainly composed from GeSb₂Te₄, Ge₂Sb₂Te₅, Ge₆Sb₂Te₉, or ZnSb_(x)Te_(y), ZnGe_(x)Te_(y), ZnGe_(Sb) _(y)Te_(z), GeSb_(x)Te_(y), for example. In this case, there can be obtained an advantage that GeSb₂Te₄, Ge₂Sb₂Te₅, Ge₆Sb₂Te₉ are fast in the phase change speed. On the other hand, ZnSb_(x)Te_(y), ZnGe_(x)Te_(y), ZnGe_(x)Sb_(y)Te_(z), GeSb_(x)Te_(y), have an advantage of being strong in the mechanical strength thereof. As a material of the lower electrode layer 102, it is preferable to apply an amorphous material, having the atomic arrangement same to that within the amorphous phase of the phase-change recording layer 104, from a viewpoint for stabilizing the amorphous phase of the phase-change recording layer 104. For example, TiSi_(x)N_(y) or TaSi_(x)N_(y) is the amorphous material having the atomic arrangement same to that within the amorphous phase of the phase-change recording layer 104. Since TiSi_(x)N_(y) or TaSi_(x)N_(y) is an amorphous material, which has an averaged distance of about 0.3 nm between the closest atoms within a surface of a contact interface thereof, and also since the amorphous phase of the main constituent material (for example, GeSb₂Te₄, Ge₂Sb₂Te₅, Ge₆Sb₂Te₉, or ZnSb_(x)Te_(y), ZnGe_(x)Te_(y), ZnGe_(x)Sb_(y)Te_(z), GeSb_(x)Te_(y)) has an averaged distance of about 0.3 nm between the closest atoms within a surface of a contact interface thereof, therefore the amorphous phase of the recording layer 104 is stabilized when TiSi_(x)N_(y) or TaSi_(x)N_(y) is in contact with the phase-change recording layer 104. For showing that effect, analysis is made on activation energy, being necessary for the amorphous phase of the phase-change recording layer 104 to be crystallized, through a molecular dynamic simulation. The molecular dynamic simulation, as is described on page 4877 of “Journal of Applied Physics”, Vol. 54 (1983), for example, is a method for calculating the position of each atom at each of times, through solving the Newton's equation of motion, upon the basis of a force acting upon each of atoms through a potential between the atoms, which is calculated out. However, within the present embodiment can be obtained a relationship, which will be mentioned later, through calculation of an interaction between elements of different kinds, by introducing the charge transfer into the method of molecular dynamics mentioned above.

The steps for making analysis upon the activation energy are as follows, being necessary for the amorphous phase of the recording layer 104 to be crystallized, through the method of molecular dynamics. Thus, an initial condition of the recording layer 104 is obtained as being the amorphous phase; i.e., the time up to when it is changed into the crystal phase (i.e., the crystallizing time), for example, in the cases of 600° C. and 700° C. Thereafter, as is executed normally, those results are displayed in the form of the Arrhenius plots, so as to draw a straight line connecting between two (2) points indicative of the results at two (2) points of temperature. From an inclination of the straight line, it is possible to calculate out the activation energy.

A manner how the activation energy depends on the main constituent material of the lower electrode 102 is shown in FIG. 2, in particular, in case when GeSb₂Te₄ is applied as the main constituent material of the phase-charge recording layer 104. It can be seen that the activation energy is remarkably large, when applying TiSi_(x)N_(y) or TaSi_(x)N_(y), being an amorphous material having the averaged distance of about 0.3 nm between the closest atoms within the surface of contact interface thereof, as a material of the lower electrode, and that the amorphous phase of the phase-change recording layer 104 is stabilized. However, in this case, TiSi_(x)N_(y) is a material of TiN being added with Si at 1 at. %. Also, TaSi_(x)N_(y) is a material of TaN being added with Si at 1 at. %.

A manner how the activation energy depends on the main constituent material of the lower electrode 102 is shown in FIG. 3, in particular, in case when Ge₂Sb₂Te₅ is applied as the main constituent material of the phase-charge recording layer 104. In the similar manner to the case shown in FIG. 2, it can be seen that the activation energy is remarkably large, when applying TiSi_(x)N_(y) or TaSi_(x)N_(y), being the amorphous material having the averaged distance of about 0.3 nm between the closest atoms within the surface of contact interface thereof, as a material of the lower electrode, and that the amorphous phase of the phase-change recording layer 104 is stabilized. Although not shown the results thereof, however it is confirmed that the similar effect to those shown in FIGS. 2 and 3 can be obtained, when applying the element selected from Ge, Sb and Te to be the main constituent material, and including at least two (2) elements therein, selected from Ge, Sb and Te, as well.

A manner how the activation energy depends on the main constituent material of the lower electrode 102 is shown in FIG. 4, in particular, in case when ZnGeTe is applied as the main constituent material of the phase-charge recording layer 104. In the similar manner to the cases shown in FIGS. 2 and 3, it can be seen that the activation energy is remarkably large, when applying TiSi_(x)N_(y) or TaSi_(x)N_(y), being the amorphous material having the averaged distance of about 0.3 nm between the closest atoms within the surface of contact interface thereof, as a material of the lower electrode, and that the amorphous phase of the phase-change recording layer 104 is stabilized. And, further it can be seen that the effect of stabilization is high, comparing to the cases shown in FIGS. 2 and 3. Although not shown the results thereof, however it is confirmed through analysis that the effect of stabilizing the amorphous phase is high, when applying the element selected from Ge, Sb and Te to be the main constituent material, including at least two (2) elements therein, selected from Ge, Sb and Te, as well, and further including Zn as the constituent element therein.

With those examples given hereinbefore, there is shown the effect of stabilizing the amorphous phase, with applying the material of TiN being added with Si at 1 at. % as TiSi_(x)N_(y), or the material of TaN being added with Si at 1 at. % is applied as TaSi_(x)N_(y). Next, in which manner this effect depends on the density of Si is shown by referring to FIGS. 5, 6, 7 and 8. In the case where the density of Si is equal or greater than 0.07 at. % and equal or less than 33 at. %, the activation energy is large, and therefore it is high in the effect of stabilizing the amorphous phase of the phase-change recording layer 104. Accordingly, it is preferable to determine the density of Si to be within this range. The reason of this is as follows. Thus, since addition of Si being equal or greater than 0.05 at. % brings about an effect of turning TiN or TaN into the amorphous phase, easily, therefore it brings about an effect of stabilizing the amorphous phase of the phase-change recording layer 104. However, if Si is added to be equal or greater than 33 at. % in the density thereof, the averaged distance between the closest atoms within the surface of contact interface thereof comes to be smaller than about 0.3 nm, remarkable; therefore, the effect of stabilizing the amorphous phase of the phase-change recording layer 104 is weaken.

As is shown in FIG. 1, since there is a necessity of forming the lower electrode 102 having a narrow width in case where the width of the lower electrode 102 is smaller than that of the phase-change recording layer 104, then it is preferable to form the lower electrode 102 through the chemical vapor deposition (CVD) or the plating, from a viewpoint of manufacturing the fine electrode. Also, if the width of the lower electrode 102 is smaller than that of the phase-change recording layer 104, since the insulating layer 103 is in contact with the lower electrode 102, it is effective to apply the amorphous material, having the averaged distance of about 0.3 nm between the closest atoms within the surface of contact interface thereof, as the insulating layer 103, from a viewpoint of stabilizing the amorphous phases of the electrode 102 and the phase-change recording layer 104. The reason of this is same to that of stabilizing the amorphous phase of the phase-change recording layer 104 when applying the amorphous material, having the averaged distance of about 0.3 nm between the closest atoms within the surface of contact interface thereof, as the lower electrode 102, as was explained previously, by referring to FIGS. 2 to 4. Such amorphous materials, having the averaged distance of about 0.3 nm between the closest atoms within the surface of contact interface thereof, are TiO_(x)N_(y) or TaO_(x)O_(y)N_(z), TiSi_(x)N_(y) or TaSi_(x)O_(y)N_(z), for example, which can be applied as the insulating layer 103.

In the present embodiment, a Piezo element is formed, so as to let the phase-change recording layer 104 to have the tensile or stretching strain therein, for the purpose of increasing the rewriting function of the phase-change recording layer 104. This is because, it is possible to relax the stress caused when chaining the phase thereof, due to the tensile or stretching strain, and thereby increasing the tolerance against rewriting. And, since making the movement of atoms swift when the tensile or stretching strain causes the phase change within the phase-change recording layer 104, it also brings about an effect that the rewriting speed comes to be fast. In FIG. 1., the Piezo element has such the structure that the ferromagnetic layer 104 p and the ferromagnetic layer 104 q are sandwiched or inserted between the lower electrode 102 and the upper electrode layer 105.

When causing the phase change by means of this Piezo element, i.e., when voltage is applied across the lower electrode 102 and the upper electrode layer 105, the tensile or stretching strain is applied to the phase-change recording layer 104. An effect of applying the tensile or stretching strain thereto is shown in FIGS. 9(a) and 9(b). Those FIGS. 9(a) and 9(b) show the time of phase change, in particular, in case of applying Ge₂Sb₂Te₅ and ZnGeTe as the main constituent material of the recording layer 104, respectively.

In FIGS. 9(a) and 9(b) are shown the time for crystallization and the time for changing into amorphous, by normalizing the value of zero (0) in the strain into one (1). A bar of thin gray indicates the time for crystallization and a bar of dark gray indicates the time for changing into amorphous. From those graphs, it can be seen that, when the tensile or stretching strain comes to be large, the time for crystallization and the time for changing into amorphous are shorten, and that the rewriting speed is fast. Though not shown in the figures, the similar effect can be obtained with other composition ratios.

Further, in this embodiment, it is preferable that the upper electrode layer 105 is a film or layer, which is formed passing through at least one of the oxidization process, the nitrization process and the oxidization/nitrization process, for the purpose of letting the phase-change recording layer 104 to have the tensile or stretching strain therein. This is because, the oxide and/or nitride intrudes into, through dealing the oxidization process, the nitrization process or the oxidization/ nitrization process; therefore compression strain is applied into the upper electrode layer 105, and as a result thereof, the tensile or stretching strain acts upon the phase-change recording layer 104 lying below. In particular, in the case of the oxidization process, it is preferable that, as the upper electrode layer 105 is applied a RuO₂ film or layer, or a IrO₂ film or layer, though being an oxidization film but a conductor. Because, the upper electrode layer 105 cannot function thereof if not having the conductivity. Or, in the case of the nitrization process, it is preferable to apply TiN film or layer, or WN film or layer, etc., to be the upper electrode layer 105, though being an oxidization film but a conductor. This is also because the upper electrode layer 105 cannot function thereof if not having the conductivity.

Embodiment 2

Next, in FIG. 10 is shown the cross-sectional structure of a principle portion within the phase change memory, according to a second embodiment of the present invention. The difference thereof from the first embodiment lies in that the lower electrode 102 is built up with two (2) layers 102 b and 102 c in the structure thereof, in the second embodiment. In this case, for a first lower electrode 102 b, it is preferable to select a material having good adherence with the wiring layer 102 a, and for a second lower electrode 102 c, it is preferable to apply an amorphous material, having the atomic arrangement similar to that in the amorphous phase of the phase-change recording layer 104, in particular, for the purpose of stabilizing the amorphous phase of the recording layer 104. Such amorphous materials, having the atomic arrangement similar to that of the amorphous phase of the recording layer 104, as well as, being preferable to be the material of the second lower electrode 102 c, are TiSi_(x)N_(y) and TaSi_(x)N_(y), for example, as was mentioned above.

Embodiment 3

Next, in FIG. 11 is shown the cross-sectional structure of a principle portion within the phase change memory, according to a third embodiment of the present invention. The difference thereof from the first embodiment lies in that the insulation layer 103 is built up with two (2) layers 103 a and 103 b in the structure thereof, in the third embodiment. In this case, for a first insulation layer 103 a, it is preferable to select a material having good adherence with the wiring layer 102 a, and for a second insulation layer 103 b, it is preferable to apply an amorphous material, having the atomic arrangement similar to that in the amorphous phase of the phase-change recording layer 104, in particular, for the purpose of stabilizing the amorphous phases of the lower electrode 102 and the recording layer 104. Such amorphous materials, having the atomic arrangement similar to that of the amorphous phase of the recording layer 104, as well as, being preferable to be the material of the second insulation layer 103 b, are TiO_(x)N_(y), TaO_(x)N_(y), TiSi_(x)O_(y)N_(z), and TaSi_(x)O_(y)N_(z), for example, as was mentioned above.

Next, in FIG. 12 is shown the cross-sectional structure of the principle portion within the phase change memory, in which the layer structure of the embodiment mentioned above. In the phase change memory according to the present invention, a gate insulation layer 202 and a gate electrode 206 are formed on a silicon substrate 201, for example, for building up a transistor, and further wiring are formed on diffusion layers 203 and 204. The wirings 208 a, 208 b, 215, 217 and 219, the lower electrode 210, the phase-change recording layer 212, the ferromagnetic layers 212 p and 212 q, the upper electrode 213 are partitioned by the insulation layers 207, 209, 211, 214, 216 and 218. The Piezo element built up with the lower electrode 210, the ferromagnetic layers 212 p and 212 q, and the upper electrode 213 is provided for obtaining an effect of increasing the rewriting tolerance and the rewriting speed, in the similar manner to the first embodiment. In FIG. 12, the transistor, which is constructed with the gate electrode 206, the gate insulation layer 202 and the substrate 201, corresponds to one (1) piece of a transistor of such a memory circuit, as shown in FIG. 13, for example. For example, the electrodes 221 and 223 putting the phase-change recording layer 223 therebetween in FIG. 13 can be turned ON/OFF by the transistor 220, thereby being accessible to an address designated. Also, in the case where the width of the lower electrode 210 is smaller than that of the phase-change recording layer 212, since the insulation layer 209 is in contact with the lower electrode 210, therefore it is effective that the insulation layer 209 is made of an amorphous material, having the averaged distance of about 0.3 nm between the closest atoms within the surface of contact interface thereof, for the purpose of stabilizing the amorphous phases of the lower electrode and the phase-change recording layer 212.

Also, in the place of the circuitry structure of applying the transistors therein, as is shown in FIG. 13, it may be so constructed that diodes 224 are applies therein for selecting the memory cells, as is shown in FIG. 14.

An example of the cross-sectional structure is shown in FIG. 15. In the structure shown in FIG. 15, the wiring 302 is formed on the substrate 301, on which are formed semiconductor layers 303 and 305 of polycrystalline silicon, and further thereon are formed the insulation layer 307, the lower electrode 308, the insulation layer 309, the phase-change recording layer 310, the ferromagnetic layers 310 p and 310 q, the upper electrode 311, the insulation layer 312 and the wiring 313. The diode for electing the memory cell is built up, through forming n⁺ region 304 by ion injection of n-type impurity into the semiconductor film or layer 303, while forming p⁺ region 306 by ion injection of p-type impurity into the semiconductor film or layer 305, for example. Herein, as the material of the lower electrode 308, it is also preferable to apply the amorphous material, having the atomic arrangement similar to that in the amorphous phase of the phase-change recording layer 310, for the purpose of stabilizing the amorphous phase of the recording layer 310. The Piezo element, being built up with the lower electrode 308, the ferromagnetic layers 310 p and 310 q, and the upper electrode 311, is provided for the purpose of obtaining the effect of improving the rewriting tolerance and the rewriting speed, in the similar manner to that of the first embodiment.

Building up a semiconductor device by applying the phase change memory explained in the above-mentioned embodiments into a semiconductor device, having an arrangement for memorizing relief address information and/or trimming information within a non-volatile memory, such as, a flash memory, for example, it is possible to obtain a highly reliable one, which has the effect mentioned above, as well. An example of such the semiconductor device is shown in FIG. 16. This example shows a SRAM memory equipped with a defect relief circuit therein. In FIG. 16, a reference numeral 403 depicts a chip, 401 a phase change memory as a program element, 402 a relief decoder, 404 an input/output circuit portion (I/O portion),and 405 a core portion, respectively. Within the core portion, there is included a CPU 407 and a SRAM cell array portion 406. It is preferable that the phase change memory program element 401 lies within the I/O portion 404, for reducing an area thereof.

Further, in the specification, the main constituent material or element means the material existing at the maximum density therein. Also, for example, the accurate ratio of composition of GeSb₂Te₄ is Ge:Sb:Te=1:2:4, however it can be considered to be substantially equivalent if it is within 10%, such as, 1:2.2:4, for example.

The present invention can be applied into an information-recording device, in the form of the phase change memory.

The present invention may be embodied in other specific forms without departing from the spirit or essential feature or characteristics thereof.. The present embodiment(s) is/are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the forgoing description and range of equivalency of the claims are therefore to be embraces therein. 

1. A phase change memory, comprising: a phase-change recording layer for recording information through changing between a crystal phase and an amorphous phase; and a means for applying a tensile strain onto said phase-change recording layer.
 2. The phase change memory, as is described in the claim 1, wherein said phase-change recording layer includes at least two selected from Ge, Sb and Te, as a constituent element thereof.
 3. The phase change memory, as is described in the claim 2, wherein said means for applying a tensile strain is a Piezo element.
 4. The phase change memory, as is described in the claim 3, wherein said Piezo element has first and second ferromagnetic layers putting said phase-change recording layer therebetween, and first and second electrodes putting said phase-change recording layer and said first and second ferromagnetic layers therebetween.
 5. A phase change memory, comprising: a substrate; a dielectric layer formed on one main surface of said substrate; a first electrode formed in contact with said dielectric layer; and a phase-change recording layer formed in contact with said first electrode; a second electrode formed in contact with said phase-change recording layer, wherein said phase-change recording layer includes at least two selected from Ge, Sb and Te, as a constituent element thereof, a main constituent material of said first electrode is TiSi_(x)N_(y) or TaSi_(x)N_(y), Si density within said first electrode is equal or greater than 0.07 at. % and equal or less than 33 at. %, and a ferromagnetic layer is put between said first electrode and said second electrode in structure thereof.
 6. A phase change memory, comprising: a substrate; a dielectric layer formed on one main surface of said substrate; a first electrode formed in contact with said dielectric layer; and a phase-change recording layer formed in contact with said first electrode; a second electrode formed in contact with said phase-change recording layer, wherein said phase-change recording layer includes at least two selected from Ge, Sb and Te, as a constituent element thereof, a main constituent material of said first electrode is TiSi_(x)N_(y) or TaSi_(x)N_(y), Si density within said first electrode is equal or greater than 0.07 at. % and equal or less than 33 at. %, a main constituent material of said dielectric layer is TiO_(x)N_(y) or TaO_(x)N_(y) or TaO_(x)N_(y) or TiSi_(x)O_(y)N_(z) or TaSi_(x)O_(y)N_(z), and a ferromagnetic layer is put between said first electrode and said second electrode in structure thereof.
 7. A phase change memory, comprising: a substrate; a dielectric layer formed on one main surface of said substrate; a first electrode formed in contact with said dielectric layer; and a phase-change recording layer formed in contact with said first electrode; a second electrode formed in contact with said phase-change recording layer, wherein said phase-change recording layer includes at least two selected from Ge, Sb and Te, as a constituent element thereof, a main constituent material of said first electrode is TiSi_(x)N_(y) or TaSi_(x)N_(y) formed through a chemical vapor deposition method or a plating method, Si density within said first electrode is equal or greater than 0.07 at. % and equal or less than 33 at. %, a main constituent material of said dielectric layer is TiO_(x)N_(y) or TaO_(x)N_(y) or TaO_(x)N_(y) or TiSi_(x)O_(y)N_(z) or TaSi_(x)O_(y)N_(z), and a ferromagnetic layer is put between said first electrode and said second electrode in structure thereof.
 8. A phase change memory, comprising: a substrate; a dielectric layer formed on one main surface of said substrate; a first electrode formed in contact with said dielectric layer; and a phase-change recording layer formed in contact with said first electrode; a second electrode formed in contact with said phase-change recording layer, wherein said phase-change recording layer includes at least two selected from Ge, Sb and Te, as a constituent element thereof, a main constituent material of said first electrode is TiSi_(x)N_(y) or TaSi_(x)N_(y), Si density within said first electrode is equal or greater than 0.07 at. % and equal or less than 33 at. %, a main constituent material of said dielectric layer is TiO_(x)N_(y) or TaO_(x)N_(y) or TaO_(x)N_(y) or TiSi_(x)O_(y)N_(z) or TaSi_(x)O_(y)N_(z), said second electrode is a layer, being formed through treating at least one of an oxidization process, a nitrization process and an oxidization/nitrization process thereon, and a ferromagnetic layer is put between said first electrode and said second electrode in structure thereof.
 9. A phase change memory, comprising: a substrate; a dielectric layer formed on one main surface of said substrate; a first electrode formed in contact with said dielectric layer; and a phase-change recording layer formed in contact with said first electrode; a second electrode formed in contact with said phase-change recording layer, wherein said phase-change recording layer includes at least two selected from Ge, Sb and Te, as a constituent element thereof, a main constituent material of said first electrode is TiSi_(x)N_(y) or TaSi_(x)N_(y) formed through a chemical vapor deposition method or a plating method, Si density within said first electrode is equal or greater than 0.07 at. % and equal or less than 33 at. %, a main constituent material of said dielectric layer is TiO_(x)N_(y) or TaO_(x)N_(y) or TaO_(x)N_(y) or TiSi_(x)O_(y)N_(z) or TaSi_(x)O_(y)N_(z), said second electrode is a layer, being formed through treating at least one of an oxidization process, a nitrization process and an oxidization/nitrization process thereon, and a ferromagnetic layer is put between said first electrode and said second electrode in structure thereof.
 10. A phase change memory, comprising: a substrate; a dielectric layer formed on one main surface of said substrate; a first electrode formed in contact with said dielectric layer; and a phase-change recording layer formed in contact with said first electrode; a second electrode formed in contact with said phase-change recording layer, wherein said phase-change recording layer includes at least two selected from Ge, Sb and Te, as a constituent element thereof, said phase-change recording layer includes Zn as a constituent element thereof, a main constituent material of said first electrode is TiSi_(x)N_(y) or TaSi_(x)N_(y), Si density within said first electrode is equal or greater than 0.07 at. % and equal or less than 33 at. %, and a ferromagnetic layer is put between said first electrode and said second electrode in structure thereof.
 11. A phase change memory, comprising: a substrate; a dielectric layer formed on one main surface of said substrate; a first electrode formed in contact with said dielectric layer; and a phase-change recording layer formed in contact with said first electrode; a second electrode formed in contact with said phase-change recording layer, wherein said phase-change recording layer includes at least two selected from Ge, Sb and Te, as a constituent element thereof, a main constituent material of said phase-change recording layer is ZnSb_(x)Te_(y) or ZnGe_(x)Te_(y) or ZnGe_(x)Sb_(y)Te_(z) or GeSb_(x)Te_(y), a main constituent material of said first electrode is TiSi_(x)N_(y) or TaSi_(x)N_(y), Si density within said first electrode is equal or greater than 0.07 at. % and equal or less than 33 at. %, and a ferromagnetic layer is put between said first electrode and said second electrode in structure thereof.
 12. A phase change memory, comprising: a substrate; a dielectric layer formed on one main surface of said substrate; a first electrode formed in contact with said dielectric layer; and a phase-change recording layer formed in contact with said first electrode; a second electrode formed in contact with said phase-change recording layer, wherein said phase-change recording layer includes at least two selected from Ge, Sb and Te, as a constituent element thereof, a main constituent material of said phase-change recording layer is ZnSb_(x)Te_(y) or ZnGe_(x)Te_(y) or ZnGe_(x)Sb_(y)Te_(z) or GeSb_(x)Te_(y), a main constituent material of said first electrode is TiSi_(x)N_(y) or TaSi_(x)N_(y), Si density within said first electrode is equal or greater than 0.07 at. % and equal or less than 33 at. %, a main constituent material of said dielectric layer is TiO_(x)N_(y) or TaO_(x)N_(y) or TaO_(x)N_(y) or TiSi_(x)O_(y)N_(z) or TaSi_(x)O_(y)N_(z), and a ferromagnetic layer is put between said first electrode and said second electrode in structure thereof.
 13. A phase change memory, comprising: a substrate; a dielectric layer formed on one main surface of said substrate; a first electrode formed in contact with said dielectric layer; and a phase-change recording layer formed in contact with said first electrode; a second electrode formed in contact with said phase-change recording layer, wherein said phase-change recording layer includes at least two selected from Ge, Sb and Te, as a constituent element thereof, a main constituent material of said phase-change recording layer is ZnSb_(x)Te_(y) or ZnGe_(x)Te_(y) or ZnGe_(x)Sb_(y)Te_(z) or GeSb_(x)Te_(y), a main constituent material of said first electrode is TiSi_(x)N_(y) or TaSi_(x)N_(y) formed through a chemical vapor deposition method or a plating method, Si density within said first electrode is equal or greater than 0.07 at. % and equal or less than 33 at. %, a main constituent material of said dielectric layer is TiO_(x)N_(y) or TaO_(x)N_(y) or TaO_(x)N_(y) or TiSi_(x)O_(y)N_(z) or TaSi_(x)O_(y)N_(z), and a ferromagnetic layer is put between said first electrode and said second electrode in structure thereof.
 14. A phase change memory, comprising: a substrate; a dielectric layer formed on one main surface of said substrate; a first electrode formed in contact with said dielectric layer; and a phase-change recording layer formed in contact with said first electrode; a second electrode formed in contact with said phase-change recording layer, wherein said phase-change recording layer includes at least two selected from Ge, Sb and Te, as a constituent element thereof, a main constituent material of said phase-change recording layer is ZnSb_(x)Te_(y) or ZnGe_(x)Te_(y) or ZnGe_(x)Sb_(y)Te_(z) or GeSb_(x)Te_(y), a main constituent material of said first electrode is TiSi_(x)N_(y) or TaSi_(x)N_(y) formed through a chemical vapor deposition method or a plating method, Si density within said first electrode is equal or greater than 0.07. at. % and equal or less than 33 at. %, a main constituent material of said dielectric layer is TiO_(x)N_(y) or TaO_(x)N_(y) or TaO_(x)N_(y) or TiSi_(x)O_(y)N_(z) or TaSi_(x)O_(y)N_(z), said second electrode is a layer, being formed through treating at least one of an oxidization process, a nitrization process and an oxidization/nitrization process thereon, and a ferromagnetic layer is put between said first electrode and said second electrode in structure thereof. 